Frequency divider employing semiconductor devices



June 21, 1966 E. M. JONES FREQUENCY DIVIDER EMPLOYING SEMI-CONDUCTORDEVICES Onginal Filed Dec. 5l, j 956 D.C. SOURCE ZSheets-Sneet 1REPETITVE PULSE SOURCE R STAGE MASTER OSC.

PULSE SOURCE F162 5 C3 R8 T o O BASE VOLTAGE b FIG 1 E l 2 k y, a mini bo T c 4 a will b 6 6 E c c INVENTOR EDWARD M. JONES ATTORNEYS E. M.JONES June 21, 1966 FREQUENCY DIVIDER EMPLOYING SEMI-CONDUCTOR DEVICESOriginal Filed Dec. 31, 1956 2 Sheets-Sneet 2 I PW) (MP) mv. f/32 DIV.

INVENTOR EDWARD M. JONES ATTORNEYS United States Patent "ice 3,257,624FREQUENCY DIVIDER EMPLoYING SEMI- CONDUCTOR DEVICES Edward M. Jones,Cincinnati, Ohio, assignor to D. H. 1

This application is a division of my application, Serial No. 631,681,filed December 31, 1956, and entitled Frequency Divider EmployingSemi-Conductor Devices.

This invention relates to relaxation oscillators employingsemi-conductive devices, such as transistors, and in particular relatesto systems for locking the frequencies of a plurality of suchoscillators in integral relationships. Such systems of cascadedoscillators have heretofore been proposed for counting, scaling andfrequency division purposes. A preferred embodiment of my invention isparticularly useful and advantageous in providing octavelyrelated,complex oscillations in electronic musical instru ments of the typewherein twelve cascaded generators are used, each one supplying all theoctavely-related notes of the same nomenclature.

A principal object of my invention is to provide a transistor frequencydivider circuit having a common base connection to all the transistorssuch as will permit the use of multiple transistor units having severalpairs of emitter and collector electrodes contacting the same crystal orhaving several crystals mounted on a common heat-dissipating base.

An important object of my invention is to provide a divider circuit forsemi-conductive devices in which synchronizing pulses of stableamplitude are produced.

Another object, which is particularly important in electronic musicalinstrument usage, is to provide a divider circuit in which thesemi-conductive devices operate at low duty cycle so as to reduce theamount of subharmonic modulation fed back from one stage to a previousstage.

A further object is to provide a frequency divider circuit, particularlyfor electronic musical instruments, wherein the DC. component iseliminated from the output oscillations of the circuit.

A further object of my invention is to provide an inexpensive and simplerelaxation oscillator circuit having a minimum number of electricalcomponents.

These and other objects of the invention which will be set forthhereinafter, or will be apparent to one skilled in the art upon readingthese specifications, are accomplished by those constructions andarrangements of parts of which certain exemplary embodiments will now bedescribed. Reference is made to the accompanying drawings wherein:

FIGURE 1 is a circuit diagram of a frequency divider circuit inaccordance with the present invention;

FIGURE 2 is a circuit diagram of a modification of the system of FIGURE1;

FIGURE 3 is a circuit diagram illustrating how a pair of complementaryjunction transistors may be connected for use in the practice of myinvention;

FIGURE 4 illustrates how connections maybe made to a particular type ofsemi-conductive device for use with my invention;

FIGURE 5 illustrates another embodiment of a semiconductive device whichmay be employed in the practice of my invention;

FIGURE 6 illustrates the manner in which connections may be made tostill another type of semi-conductive device for use with my invention;

FIGURE 7 illustrates certain wave forms, useful in explaining theoperation of the system;

3,257,624 Patented June 21, 1966 FIGURE 8 is a view in transversesection taken through FIGURE 9, and enlarged to indicate details ofconstruction; and

FIGURE 9 is a functional diagram of a system according to the invention,utilizing one specific but exemplary form of common base multiplecontact sets transistor.

Referring now more particularly to the accompanying drawings, FIGURE 1illustrates a circuit diagram of two similar stages 1 and 2 of acascaded frequency divider. A repetitive pulse source 5, of positivelygoing pulses, may be a master oscillator of any suitable type, producingshort duration pulses periodically. One example of a suitable source isdisclosed in a copending patent application in the name of Jones andWinder, filed December 31, 1956, Serial No.-631,682, now U.S. Patent No.2,902,655, and entitled Transistor Oscillators, another example beingdisclosed in the United States Patent to Jones, No. 2,555,- 038. Oneterminal of the source 5 may be connected to a comm-on return path 7,while the other terminal supplies periodic pulses through a resistor R1to a common junction point 9, to which is also connected one end of aresistor R2, the other end of which is connected to a common path 11from one terminal of a source 13 of direct current. The other terminalof the D.C. source 13 may be connected to the common return path 7. Thecommon path 11 is maintained at approximately 20 v. negative withrespect to common return path 7, by source 13.

A capacitor C1 and a resistor R3 may be connected in series between thejunction point 9 and the common return path 7. The common juncture 15between the capacitor C1 and the resistor R3 has a connection to anemitter terminal a of a semi-conductive device, T1, which may be, forexample, a point-contact transistor, the terminal 0 being the baseconnection to a block of semi-conductor material, and the terminal bidentifying the so-called collector electrode. In accordance with theteachings of my invention the base connection 0 is made directly to thecommon path 7, while the collector electrode is connected through aresistor R4 to the common junction point 9. The series of elements asdescribed constitutes stage 1 of the frequency divider and, as will beexplained hereinafter, there will occur at the junction point 17 aseries of periodic pulses, the repetition frequency of which will be anintegral submultiple of the frequency supplied to the stage 1 from therepetitive pulse source 5. A saw-tooth wave-form at the dividedfrequency will also appear across the resistor R3, which, .as will alsobe explained hereinafter, may be used as a signal take-off point, ifdesired.

Stage 2 of the frequency divider of FIGURE 1 is similar to stage 1except that the capacitor C2 will be selected of a higher capacity thanthe corresponding capacitor C1 of stage 1, so that the time constant ofthe stage will be lower than that of the preceding stage by an amountwhich is of the order of the dividing ratio between adjacent stages.Corresponding resistors and junction points are similarly designated inthe two stages, except for the prime indication. For example, R of stage2 corresponds to R1 of stage 1.

The operation of the stage 1 is in certain respects similar to that ofother transistor relaxation oscillator circuits currently known in theart (see RCA Review, March 1949, pp. 1416, and December 1949, pp. 463-471), one principal impovement residing in the employment of thecollector resistance R4, which is made unusually low for the purpose ofdischarging the capacitor C1 in a very short time, so that train E, ofvery narrow pulses P1, P2 (see FIGURE 7a) is produced at the collector12. These voltage pulses have amplitudes nearly equal to the supplyvoltage E of the source 13 and is transferred to the second stagethrough the resistor R1. If the transistor T2 is cut off, the triggerpulses appearing at circuit points 9 and 15' are very nearly equal tothe value expected from the voltage dividing effect of the resistors R1and R2. If the trigger pulse brings the emitter voltage e3 (see FIGURE7b) of transistor T2 positive with respect to the base voltage, thecollector current will start increasing, causing an increased voltagerise in R2, which is transmitted through capacitor C2 to furtherincrease emitter voltage e3. The emitter now has a low impedance, and acurrent gain of only slightly greater than one is required in thetransistor to cause a rapid regenerative increase in emitter andcollector current. The collector current then immedtialy increases to avalue which provides sufficient potential across resistance R4 to lowerthe magnitude of negative collector potential (see FIGURE 70)sufiiciently to bring the current gain back down to unity. The resistorR4 is chosen to limit collector current, assuring that the collectorcurrent is safely under the allowable peak current for the point-contacttransistor employed. Since the emitter voltage e3 never goes verypositive, the potential e2 (FIG- URE 7d) is initially quite negative dueto the charge on the capacitor C2. However, due to the relatively heavyemitter current, the capacitor C2 is quickly discharged so that e2 risesquickly (point B of FIGURE 7D) toward ground potential. During thisdischarge, the collector voltage e4 remains approximately constant (seeFIGURE 70) at several volts negative, but the current in R2 becomesappreciable, causing emitter current to drop considerably below themagnitude of collector current.

The capacitor C2 is eventually discharged to a point where the emittercurrent is sufliciently low relative to the collector current that thecollector voltage, e4, begins to become more negative. This implies anegative impedance relationship between collector voltage and collectorcurrent. The emitter voltage e3 is still changing very slowly, so theemitter impedance is very small and the capacitor C2 prevents any suddenchange in e2. When the magnitude of this negative impedance at thecollector exceeds the value of R4, the decrease in voltage drop acrossR4 fails to keep up with the increase in magnitude of negative collectorvoltage e4 demanded by the transistor to maintain a given decrease inmagnitudes of collector and emitter current. The transistor T2 thusfinds itself in a situation such that, at a given collector voltage, itscollector current has a greater'magnitude than the emitter current wouldnormally allow. The collector current therefore rapidly decreases,making the collector more negative, but the emitter current decreasesalso, making an even greater discrepancy between the actual collectorcurrents and the collector current than would be predicted from thevalues of emitter current and collector voltage alone.

When the magnitude of the collector current has decreased sufiiciently,the emitter current becomes negative and the emitter voltage e3 rapidlygoes negative. librium is reached when the emitter voltage magnitudeequals the magnitude of the supply voltage minus the voltage drop inresistance R2 due to the residual emitter and collector currents andminus the charge on the capacitor'CZ. This charge on the capacitor isessentially the same as occurs when negative impedance appears at thecollector, since the entire process involved in the transistor reachingequilibrium in a cut-off condition requires only a fraction of amicrosecond, compared with the 2 to 50 microseconds period during whichheavy emitter current was discharging the capacitor C2.

After the transistor T2 has been cut off, the capacitor C2 charges at amore leisurely rate (see point A of FIGURE 7b) through resistor R3 andthe back resistance of the emitter. To render the charging rate lessdependent upon the characteristics of the transistor T2, it is desirableto make resistor R3 several times less than the emitter back resistance.The time constant of this circuit is arranged to be such that when thefirst trigger pulse p1 from stage 1 arrives, the emitter voltage e3 isEquiv still too negative for the trigger pulse to have any effect, butwhen the second trigger pulse 12 arrives, the emitter is driven positiveenough for the regenerative action in the transistor hereinabovedescribed to take place. The stage thus acts as a frequency divider,having a division factor 2.

Since a saw-tooth signal having the same wave shape as the emittervoltage e3 appears across the resistor R3, a portion of the resistor R3may be used as a signal take-off point.

The transistor circuit may have such characteristics, with such suitableselection of components as will be suggested hereinafter in connectionwith the embodiment of FIGURE 2, that in the absence of trigger pulses,it will not function as a self-sustaining relaxation oscillator. This isbecause, when the emitter current is zero, which is approximately thefinal condition towards which the capacitor C2 discharges the impedanceof the emitter of the transistor is still fairly high and comparable toR2,

and therefore if the transistor has some current gain, a

sufficiently large proportion of the collector current increment isshunted through R2 that regenerative feedback to the emitter cannotoccur. This implies that the transistor will fire only upon applicationof a trigger pulse. It is not necessary to the operation of the system,however, that a stage he inoperative until triggered, so long as thefrequency of oscillation is lower than the trigger frequency. Under thelatter circumstances, the trigger will cause the stage to besynchronized-at the divided frequency.

Reference is now made to FIGURE 2, wherein is illustrated an embodimentof my invention preferred for use as a tone-wave generator in anelectronic musical instrument. The master oscillator 19 is preferably atransistorized oscillator having a pulse-shape output, as disclosed inthe above-mentioned copending application of Jones and Winder, with aconnection to a common return. The output of the oscillator 19 is passedthrough a resistor R5 to a junction point 21. From this junction pointproceed connections to a resistor R7 and directly to the collectorelectrode b of a semi-conductive device T3, which may be, as pointed outin connection with the embodiment of my invention illustrated in FIGURE1 of the drawings, a point-contact transistor or other suitablesemi-conductive device, or combination of such devices, variousembodiments of which are illustrated in FIGURES 3, 4, 5 and 6. Thevarious other connections to the semi-conductive device T3 are made asshown, resistors R5, R6 and R7 serving purposes similar to those ofresistors R1, R2, and R4, respectively, of FIGURE 1. The capacitor C3 ofFIGURE 2 is similar in function to capacitor C1 of FIGURE 1, while aresistive divider comprising resistors R8 and R9 has been substitutedfor the resistor R3 of FIGURE 1. The common junction be tween resistorR8 and R9 may be utilized as a signal takeoff point to signal outputterminals 23 and 25, the latter being connected to a common returnpoint. A source of negative DC. potential may be connected to theterminal 27, while a source of low positive potential E1 may beconnected to the terminal 29, the point of zero potential at the sourcebeing connected to a common return path, indicated as a groundconnection. A second stage may be connected to the first stagewithcorresponding resistors in the several stages identified bycorresponding reference symbols, prime designations indicating resistorsof the second stage. The capacitor C4 will have a value substantiallydifferent from the capacitor of C3, depending upon the dividing ratio ofthe circuit, but other circuit components may be identical in theseveral stages.

The operation of the circuit of FIGURE 2 is similar to that of FIGURE 1,the differences being 1) that the resistor R5 is connected to thecollector end of the resistor R7 rather than to the emitter end, and (2)that the resistor divider comprising R8 and R9 replaces resistancemaintained slightly positive relative to a reference value or ground, sothat the signal is devoid of a DC. component. This is particularlydesirable if the signals are to be applied directly to the key switchesof an electronic musical instrument. As will be seen in the chart below,the values of R9 and R9 are relatively low (of the order of 1000 to 2000ohms), so that the key switches of the musical instrument do not undulyload down thecircuit or affect the time constants of the transistorcircuits.

Only a small trigger is required for the operation of circuits inaccordance with my invention. With resistors R6 and R5 of the order of1,000 ohms and 12,000 ohms, respectively, the actual trigger amplitudeequals 1.2 volts, which is several times the minimum trigger requiredfor the operation of the circuit.

The circuits of FIGURES 1 and 2 have been illustrated and described asemploying point-contact transistors. However, it is within the scope ofmy invention to employ other semiconductive devices, or combinations ofthese, of such type as to provide current gain between a circuit throughthe terminals a and c and a circuit between the terminals b and c. Forexample, in FIGURE 3, are illustrated two complementary types ofjunction transistors, connected with the collector electrode of a PNPjunction' transistor connected to the base of an NPN junctiontransistor, the b connection being taken from the emitter of the lattertransistor.

Another embodiment of a semi-conductor device which may be used in thepractice of my invention is illustrated in FIGURE 4, wherein is shown anNPN junction transistor, the a or emitter-equivalent connection being anelectrode connected to the N-type section of the transistor, as apoint-contact or as a welded or fused P-type contact. The NPN transistorof this embodiment should be of a relatively low resistivity material.

In FIGURE 5 is illustrated a further embodiment of a semi-conductivedevice suitable for use with the circuits of FIGURES 1 or 2, in the formof a PNPN-type transistor, which is per se well known in the art, andwherein the a, b and connections are made as shown. This transistor isalso preferably of a relatively low resistivity material.

The embodiment of FIGURE 6 is still another variar tion of asemi-conductive device suitable for use with my invention, the type ofunit being of the type described to the art by Shockley and sometimescalled the so-called npnI type of semi-conductive device. This devicewould require a DO. source, if employed in the system of FIG- URE 1,having opposite polarity.

Following is an exemplary set of Values for the components and voltages,of a system in accordance with that illustrated in FIGURE 2:

R5, R ohms 12,000 R6, R6 do 1,000 R7, R7 do 100 R8 do 17,500 R9 do 1,350R8 db 21,300 R9 do 1,600 C3 mf .0082

C4 do .015

T3, T4 W. E. #1768 E1 volts plus .27 E2 do minus Trigger voltage (peakto peak) from master oscillator is 1.05 volts.

The above set of values is for a frequency division ratio of 2 to 1. Itis within the scope of my invention to provide for obtaining dividingratios of higher integral values, depending upon the needs of theproblem at hand. It will be obvious to one skilled in the art thatintegral division ratios greater than 2:1 may be obtained by properselection of components to obtain time constants suitable for the higherdivision ratios.

As pointed out above the frequency divider circuit of the presentinvention is particularly adaptable to multiple transistor units on acommon base. The state of the transistor device art has progressed tothe point where a transistor of the type illustrated in FIGURES 8 and 9is feasible. Referring first to FIGURE 8, mountedon a common pedestal30, which may have a suitable electrical connection C comparable to thebase connections of other preceding figures, is a small slab 31, whichmay be of germanium, silicon or other semi-conductor material suitablefor transistor use. In accordance with the teachings of the article byMoll et. al. on P-N-P-N transistor switches, in the September1956-Proceedings' of the IRE, pages 1174 to 1182, junctions may bearranged as indicated at 32 and 33 to provide P-N-P-N junctiontransistor units, which may be distributed around the slab 31 as shownin FIGURE 9. The conductivity types for the various semi-conductor areasof the assembly are indicated in FIGURE 8. For example if the slabmaterial is N-type the area 33 is P-type and the area 32 is P-type, andvice versa, as indicated in parentheses. Suitable connections may bemade to the areas shown by leads a1, b1, and a2, b2, these units beingconnectable into the circuits of FIGURES 1 and 2, having correspondinginto the circuits of FIGURES 1 and 2, having corresponding indicia a andb. Interconnecting resistors (not shown), such as R in FIGURE 2, theunderstood to be provided to. couple the various divider circuitstogether.

If the conductivity types indicated in the drawings within.

parentheses are employed, the polarity of the DC. source must bereversed, as is well understood.

Referring to FIGURE 9, an exemplary arrangement is shown for connectionsto a master oscillator 34, which may be of the type referred tohereinabove. Various divider sections such as 35 and 36, may beconnected as shown. It will be obvious that for 2:1 frequency dividersan arrangement such as that illustrated in FIG- URE 9 will furnishharmonically related frequencies f, f/2, f/4, and so forth.

Although the particular multiple transistor arrangement illustrated inFIGURES 8 and 9 has been above described, it will be obvious that otherand different multiple transistors may be employed. For example,distributed around a common base may be pairs of emitter and collectorpoints contacting the base in the manner conventional for point contacttransistors (not shown). The scope of the arrangement is not,accordingly, restricted to any particular type of transistor systememploying a common base and multiple sets of contacts, but is common toall such arrangements.

While I have described and illustrated one specific embodiment of myinvention, it will be clear that variations of the general arrangementand of the details of construction which are specifically illustratedand described may be resorted to without departing from the true spiritand scope of the invention as defined in the appended claims.

What I claim is: v

1. A generator for harmonically-related frequencies comprising amultiple transistor having a first terminal for a portion of saidtransistor, said portion being common to a plurality of separatecurrent-gain sections, each section having a collector electrode and anemitter electrode, a master oscillator circuit connected to said firstterminal and to the two electrodes of a first of said sections, and aplurality of frequency divider circuits connected to said masteroscillator and connected, respectively, to remaining ones of saidsections by means of the respective pairs of electrodes for each sectionand signal take-off leads coupled to the respective frequency dividercircuits.

2. A frequency divider chain operable from a direct current sourcehaving two terminals, and in response to a source of repetitive pulses,comprising a first semiconductor amplifier having an emitter, acollector and a base, a second semi-conductor amplifier having anemitter, a collector and said base, a separate common junctionassociated with each of said semiconductor amplifiers, a direct currentconnection from each common junction to one of said two terminals, adirect current connection from said base to the other of said twoterminals, a direct current connection from each common junction to theassociated collector, a capacitive connection between each commonjunction and the associated emitter, a direct current connection betweensaid collectors, and a connection between said source of repetitivepulses and the common junction of said first semi-conductor amplifier.

3. A generator for harmonically-related frequencies comprising amultiple transistor having a plurality of current gain sections eachhaving a first electrode common to the other sections and a collectorelectrode and an emitter electrode, master oscillator circuit meansconnected to the electrodes of a first of said sections, frequencydivider circuit means connected to said-master oscillator circuit meansand the electrodes of the others of said sections in frequency divisionsequence, and means coupled to each of said current gain sections forderiving an output therefrom at a different frequency, said frequenciesbeing integrally related.

4. A source of integrally frequency related signals comprising amultiple transistor array having a first terminal identical for aplurality of current gain sections, each of said current gain sectionshaving a collector terminal and an emitter terminal, a plurality offrequency divider circuit means respectively coupled to the threeterminals of each of said current gain sections, means coupling saidplurality of frequency divider circuit means in cascade, each of saidcircuit means having a separate take-off means, and a source of inputsignal coupled to the first only of said frequency divider circuit meansin cascade.

5. A pulse-repetition-frequency dividing circuit, comprising thecombination of a multiple semi-conductive device having a plurality ofindividual sections, each of said sections having plural sets ofterminals, a, b and c, said sections being capable of providing currentgain from a circuit through each pair of said terminals :1 and c, to acircuit through a corresponding pair of said terminals b and 0, each ofsaid sections including a pulse input network comprising a firstresistor, a capacitor and a second resistor in series in that order, thefree end of the second resistor being connected to said terminal c, saidterminal a being connected to a first common juncture between saidsecond resistor and said capacitor, a third resistor connected betweensaid terminal b and a second common juncture between said first resistorand said capacitor, 9. direct current potential source, and a fourthresistor being connected between said second common juncture and oneterminal of said direct current potential source, the other terminal ofsaid direct current potential source being directly connected to saidterminal 0, a master pulse oscillator connected to the free end of thefirst resistor of one of said sections only, and means connecting theother of said plurality of sections in cascade with said one sectionincluding a resistor connected between the terminal b of a precedingsection and the free end of the first resistor of the next cascadedsection, the circuit values of each of said capacitors being scaled tothat sub-multiple saw-tooth repetition frequencies appear across saidsecond resistors. 6. A pulse-repetition-frequency dividing circuit,comprising the combination of a multiple semi-conductive device having aplurality of individual sections, each of said sections having pluralsets of terminals a, b and c, said sections being capable of producingcurrent gain from a circuit through each pair of said terminals a and cto a circuit through corresponding terminals b and 0, each of saidsections including a network comprising a first resistor connectedbetween a pair of said terminals a and c, a capacitor and a secondresistor connected in series between said terminals a and b, the freeend of said capacitor being connected to said terminal a, said secondresistor being of low value compared to said first resistor, a thirdresistor connected between a source of direct current potential and thecommon juncture of said capacitor and said second resistor, and meansconnecting said plurality of sections in cascade including a resistorconnected between the terminal b of a preceding section and said commonjuncture of the next cascaded section. 7. A frequency divider,comprising a transistor device having plural pairs of emitters andcollectors and a common base electrode, a capacitor connected betweeneach pair of said emitter and collector electrodes, a resistancecon-nected between each pair of said emitter and base electrodes, a twoterminal source of direct current bias voltage having one terminalconnected in series with said capacitors to said emitter electrodes andhaving another terminal connected to said base, a source of repetitivepulses having one terminal connected to one of said emitter electrodesvia one of said capacitors and another terminal connected to said base,and means connecting said plural pairs of emitters and collectors incascade including a further resistance connected from the collectorelectrode of a preceding pair to the emitter electrode of the nextcascaded pair via its associated capacitor.

8. The combination in accordance with claim 7, wherein is provided meansfor deriving output voltages from across at least a portion of each ofsaid resistances.

9. A pulse generator synchronized by periodic pulses, comprising amultiple semi-conductor amplifier device including multiple pairs ofemitters and collectors, a common base for all said emitters andcollectors, a capactive path only between each pair of said emitters andsaid collectors, said capacitive path including a capacitor and adischarge path, a charging resistance between each of said emitters andsaid common base, said common base being connected directly to a pointof fixed reference potential, a source of bias voltage connected inseries with said capacitors and said charging resistances, the timeconstants of said charging resistance and capacitor for each of saidmultiple pairs being approximately integral diiferent numbers times theperiod of said periodic pulses, the time constants of the dischargepaths of said capacitors between said emitters and said collectors beingrelatively small, means connecting said multiple pairs of emitters andcollectors in cascade including a further resistance connected from thecollector of a preceding pair to the emitter of the next cascaded pairvia its associated capacitor, and means applying said periodic pulses tothe emitter of the first cascaded pair via its associated capacitor.

References Cited by the Examiner UNITED STATES PATENTS 2,655,607 10/1953Reeves 30788.5 X 2,801,348 7/1957 Pankove 307-885 2,889,469 6/1959 Green307-885 2,922,898 1/1960 Henisch 30788.5 2,967,952 1/1961 Shockley30788.5

ROY LAKE, Primary Examiner.

1. A GENERATOR FOR HARMONICALLY-RELATED FREQUENCIES COMPRISING AMULTIPLE TRANSISTOR HAVING A FIRST TERMINAL FOR A PORTION OF SAIDTRANSISTOR, SAID PORTION BEING COMMON TO A PLURALITY OF SEPARATECURRENT-GAIN SECTIONS, EACH SECTION HAVING A COLLECTOR ELECTRODE AND ANEMITTER ELECTRODE, A MASTER OSCILLATOR CIRCUIT CONNECTED TO SAID FIRSTTERMINAL AND TO THE TWO ELECTRODES OF A FIRST OF SAID SECTIONS, AND APLURALITY OF FREQUENCY DIVIDER CIRCUITS CONNECTED TO SAID MASTEROSCILLATOR AND CONNECTED, RESPECTIVELY, TO REMAINING ONES OF SAIDSECTIONS BY MEANS OF THE RESPECTIVE PAIRS OF ELECTRODES FOR EACH SECTIONAND SIGNAL TAKE-OFF LEADS COUPLED TO THE RESPECTIVE FREQUENCY DIVIDERCIRCUITS.